1. Field of the Invention
This invention relates to a single-chip microcomputer having a mask read-only memory (ROM) in which instructions or like programs are set in a manufacturing process and particularly to a single-chip microcomputer which has a function of avoiding errors in such programs.
2. Description of the Prior Art
FIG. 4 is a block diagram showing the internal configuration of a prior art single-chip microcomputer. In the Figure, reference numeral 1 designates a mask ROM, in which necessary instructions or the like programs for data processing are stored, 2 a central processing unit (CPU) having a programable counter (PC) 3 for storing address data accessing the mask ROM 1 and performing operations and control, 4 an address bus, through which address signals flow, and 5 a data bus, through which data signals flow.
This prior art microcomputer operates as follows. The instructions or programs in the mask ROM 1 are set in a process of integrated circuit manufacture. The PC 3 in the CPU 2 accesses a given address of the mask ROM 1, and the CPU 2 takes in a corresponding instruction in the mask ROM 1 and performs operations and control according to this instruction. Subsequently, the PC 3 accesses another address of the mask ROM 1, in which the next instruction is stored, and performs again similar operations.
The process of manufacturing the mask ROM consists of, for instance, a field formation step, a gate formation step, a depletion step, a source/drain formation step, a contact formation step and an aluminum step. Programs or the like data are set in the depletion step.
In the prior art single-chip microcomputer with the mask ROM manufactured in the above process, if it is found after the manufacture that instructions in some of the addresses of the mask ROM are inconvenient in use, that is, if it becomes necessary to correct programs, it is necessary to set instructions or programs in the mask ROM afresh by producing the microcomputer afresh.